Top

Circuit-Level Failure Data Mapping into SAP Quality Modules for Predictive Maintenance in IC Fabrication

Authors

Nagendra Harish Jamithireddy
Jindal School of Management, The University of Texas at Dallas, United States

Files

PDF

Abstract

Integrated circuit fabrication depends on early recognition of failure patterns because small circuit-level abnormalities can quickly become larger quality and maintenance problems. Although recent studies have advanced predictive maintenance, intelligent execution systems, and semiconductor defect analysis, most existing work still stops at prediction or yield estimation and does not clearly connect circuit-level failure data with SAP-based quality workflows. This study addresses that gap by proposing a framework that standardizes failure records, maps them into SAP quality modules, and supports predictive maintenance through scoring and trigger logic. The results show strong alignment between circuit-level fault signatures and SAP quality event records, reliable maintenance prediction across IC failure categories and fabrication stages, earlier maintenance action, lower unplanned downtime, and stable performance under increasing failure-event density, wafer throughput, and SAP transaction load. These findings show that the framework can turn low-level failure analytics into usable enterprise-quality maintenance action in IC fabrication.

PDF

Details