AI-Assisted Fault Localization in Complex PCB Layouts Using Graph-Based Signal Path Analysis
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Abstract
Printed circuit boards are essential to modern electronic systems, but fault localization becomes harder as layouts grow denser and more interconnected. A local defect can affect multiple connected paths, making the true electrical fault difficult to identify through visual inspection alone. Recent studies have improved PCB defect detection using AI-based inspection models, but most of them still focus on visible defect identification rather than true fault-source localization. To address this gap, this article presents an AI-assisted fault localization framework based on graph-based signal path analysis. The method converts PCB layouts into graph representations, evaluates signal path consistency, measures path deviation, aggregates regional fault likelihood, and ranks candidate fault regions using AI support. The results show that the framework provides better fault-source separation, stronger ranking stability, and better robustness under noise, dense routing, and increasing graph complexity than baseline approaches. These findings show that graph-guided signal reasoning offers a more reliable basis for PCB diagnosis. The proposed framework can support automated inspection, debugging, repair guidance, and reliability assessment in advanced electronic systems.